QSERL: Quasi-Static Energy Recovery Logic

A new Quasi-Static Energy Recovery Logic family (QSERL) using the principle of adiabatic switching is proposed in this paper. Most of the previously proposed adiabatic logic are dynamic and require complex clocking schemes. The proposed Quasi-Static energy recovery logic uses two complementary sinusoidal supply clocks and resembles behaviors of static CMOS. Thus, switching activity is signiicantly lower than dynamic logic. In addition, QSERL circuit can be directly derived from static CMOS circuits. A high-eeciency clock generation circuitry which generates two complementary sinusoidal clocks required by QSERL is also presented in this paper. The adiabatic clock circuitry locks both frequency and phase of clock signals, which makes it possible to integrate adiabatic module into a VLSI system. We have designed an 8x8 carry-save multiplier using QSERL logic and two phase sinusoidal clocks. SPICE simulation shows that the QSERL multiplier can save 37% of energy over static CMOS multiplier at 100 MHz.